main/pcre2: upgrade to 10.43

main/pcre2/APKBUILD

 # Contributor: Jakub Jirutka <jakub@jirutka.cz>
 # Maintainer: Jakub Jirutka <jakub@jirutka.cz>
 pkgname=pcre2
-pkgver=10.42
-pkgrel=3
+pkgver=10.43
+pkgrel=0
 pkgdesc="Perl-compatible regular expression library"
 url="https://pcre.org/"
 arch="all"
@@ -19,9 +19,7 @@ subpackages="
 	libpcre2-16:_libpcre
 	libpcre2-32:_libpcre
 	"
-source="https://github.com/PhilipHazel/pcre2/releases/download/pcre2-$pkgver/pcre2-$pkgver.tar.bz2
-	sljit-riscv64-fix.patch
-	"
+source="https://github.com/PhilipHazel/pcre2/releases/download/pcre2-$pkgver/pcre2-$pkgver.tar.bz2"
 
 # secfixes:
 #   10.41-r0:
@@ -70,6 +68,5 @@ tools() {
 }
 
 sha512sums="
-72fbde87fecec3aa4b47225dd919ea1d55e97f2cbcf02aba26e5a0d3b1ffb58c25a80a9ef069eb99f9cf4e41ba9604ad06a7ec159870e1e875d86820e12256d3  pcre2-10.42.tar.bz2
-cf4cd261864751ef8827617f0187adee4284ebe6e8a244dc71bcccccb3d91f250ef3ad003352f88b737f3ed6d02635bda93056ad908032b5b45a7bd5902995c8  sljit-riscv64-fix.patch
+8ac1520c32e9e5672404aaf6104e23c9ee5c3c28ad28ff101435599d813cbb20e0491a3fd34e012b4411b3e0366a4c6dfa3f02d093acaa6ff0ab25478bb7ade9  pcre2-10.43.tar.bz2
 "

main/pcre2/sljit-riscv64-fix.patch

-Patch-Source: https://github.com/zherczeg/sljit/pull/223
-From 41782f80e61b3e8dd31b480ea7ad4ce2c62f4dcd Mon Sep 17 00:00:00 2001
-From: Yang Liu <liuyang22@iscas.ac.cn>
-Date: Tue, 5 Dec 2023 17:19:03 +0800
-Subject: [PATCH] riscv: fix getput_arg and load_addr_to_reg
-
-This was discovered while running pcre2 tests on QEMU with Sv48 kernel. This
-patch fixes `getput_arg()` and `load_addr_to_reg()` for large immediate cases.
-Tested with sljit tests and pcre2 tests.
-
-Reported-by: Felix Yan <felixonmars@archlinux.org>
-Reported-by: dramforever <dramforever@live.com>
----
- sljit_src/sljitNativeRISCV_common.c | 7 +++----
- 1 file changed, 3 insertions(+), 4 deletions(-)
-
-diff --git a/src/sljit/sljitNativeRISCV_common.c b/src/sljit/sljitNativeRISCV_common.c
-index 3bdd7ff0..64bd411d 100644
---- a/src/sljit/sljitNativeRISCV_common.c
-+++ b/src/sljit/sljitNativeRISCV_common.c
-@@ -348,13 +348,12 @@ static SLJIT_INLINE void load_addr_to_reg(void *dst, sljit_u32 reg)
- 		if ((addr & 0x80000000l) != 0)
- 			high = ~high;
- 
--		if ((high & 0x800) != 0)
--			high += 0x1000;
--
- 		if (flags & PATCH_ABS52) {
- 			SLJIT_ASSERT(addr <= S52_MAX);
- 			inst[0] = LUI | RD(TMP_REG3) | (sljit_ins)(high << 12);
- 		} else {
-+			if ((high & 0x800) != 0)
-+				high += 0x1000;
- 			inst[0] = LUI | RD(TMP_REG3) | (sljit_ins)(high & ~0xfff);
- 			inst[1] = ADDI | RD(TMP_REG3) | RS1(TMP_REG3) | IMM_I(high);
- 			inst++;
-@@ -940,7 +939,7 @@ static sljit_s32 getput_arg(struct sljit_compiler *compiler, sljit_s32 flags, sl
- 
- 	/* Since tmp can be the same as base or offset registers,
- 	 * these might be unavailable after modifying tmp. */
--	if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA))
-+	if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA) && reg == TMP_REG2)
- 		tmp_r = reg;
- 
- 	if (SLJIT_UNLIKELY(arg & OFFS_REG_MASK)) {